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Azuro

Looks like that they provide a very promising clock tree synthesis point tool, half buffer inserted compared to encounter with latency, skew, power... all better!!!

Ö÷Ö¼£º Azuro, Inc. £¨²é¿´ Google ±ßÀ¸ÆÀ×¢£©

Script to fix random number suffix generated by RC uniquify

If you are a reader of John Cooley's DeepChip, you must be familiar with the slogan that "It's not a BUG; it's a FEATURE!". Neither do I think it's a bug that RTL Compiler adds five- or six-digit random number suffixes to module names during uniquify and there must be good reasons for C company to do so.

It's fine with me, but not fine with our DfT tool. Our aged DfT tool needs a fixed list of bistshells and clock gating cells and can't work even one module name is changed. Instead of bistshell_32898 and bistshell_236840, bistshell_0 and bistshell_1 are more preferred.
Previously I fix the names by sed script that is too time consuming as module names inscrease, so I ask for a RC script from C Company. I received a script yesterday, played with it and wrote a new one this afternoon.

It's very simple. You can modify and redistribute it freely. Please notice that the scripts is provided "as is". I have tested it with one big subdesign. However, as an IC designer, I have to reminde that YMMV, :-P

Download: change_uniq_name.tcl

Usage: after uniquify and map, source the script in rc and call procedure "change_uniq_name".

Suggest: At the first time, comment line 63 "mv $module_name ${x}_${count}" and redirect output to a log file. The file will list both original name and target name of every module that will be modified. Please Check it carefully. If everything is OK, uncomment and go!