(V)HDL
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- An Introduction to the Concepts of Timing and Delays in Verilog
- Celia's Verilog & EDA Web Page
- CSCI 320 Computer Architecture Verilog Manual
- Launchbird Design Systems, Inc.
- NC-VHDL Simulator Help -- Table Of Contents
- Spreadsheet HDL interface generator VHDL Verilog entity architecture module
- SystemC Training Course from Forte Design Systems
- Verilog HDL On-line Quick Reference, by Sutherland HDL, Inc., Copyright 1997
- Verilog HDL
- VERILOG INTRODUCTION FOR DIGITAL DESIGN
- Verilog to VHDL RTL translator
- Xilinx Application Notes - HDL Synthesis and Simulation
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8051
- Oregano.at - Service
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Academy
- Asad Abidi Research Group
- Bob Reese's Home Page
- CMOS technology demonstration
- CMOS VLSI Design - EE366 - University of Hawaii - Claudio Talarico
- Electronic Devices
- Michael John Sebastian Smith
- PDTOOLS
- Research in Analog Integrated Circuit Design
- TCAD MAIN PAGE
- webcast.berkeley Courses Schedule
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Arithmetic
- Arithmetic Module Generator for High Performance VLSI Designs
- Technical Report on Floating Point Exponential Function
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Books
- CMOS Circuit Design, Layout and Simulation
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Cell Library
- Standard Cell Library
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Company
- IC Nexus ASIC Design Service
- Manhattan Routing, Inc. - We Put the Silicon in Silicon Alley
- SBT Homepage
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Computer Architecture
- LISA - Language for Instruction Set Architectures
- LSU EE 7700-2 - References
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CPU
- CPU Design HOW-TO CPU Design and Architecture
- DFP
- fpgacpu.org - FPGA CPU News
- Gaisler Research
- xr16vx in JHDL
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CVS
- WinCVS 1.3 QuickStart Guide
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DFT
- DFT-other-links
- EE-EVALUATION ENGINEERING Magazine
- Vishwani Agrawal
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FFT
- Fast Fourier Transforms
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Formal Verification
- RuleBase - Papers
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FPGA
- Chuck Benz's ASIC-FPGA pages
- fpgacpu.org - FPGA CPU News
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Funny
- http--www.easics.be-webtools-crctool
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GDSII
- Static Free Software Home Page
- The Homepage of Serban-Mihai Popescu
- XRLCAD -- A C++ library for manipulating Calma (GDS) and CIF libraries
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GNU TOOLS
- -public-ftp-pub-Linux-apps-circuits
- ASIC Standard Cell Library Design by Graham Petley
- CVS
- The LEX & YACC Page
- Writing an Interpreter with Lex, Yacc, and Memphis
- Haikun Zhu - Computer Science and Engineering - UC San Diego
- Handasa Arabia
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IP Directory
- IP Product Library
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Journals
- IBM Technical Journals
- Larry Pileggi
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Magazine
- Extension Media Chip Design Magazine
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Mobile Presence
- Mobile Presence Architectures, Protocols, and Applications
- NetSeminar
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Papers
- Dave Tweed's Index to Circuit Cellar Ink
- ESSCIRC Conference Series
- SIGDA Proceeding Archives
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Parameter Extraction
- Welcome
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PCI
- Craig Hart's PCI Information Pages
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Process
- Welcome to The INFRASTRUCTURE Semiconductor Manufacturing Tour
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Resource
- alper ucar homepage
- Jeff's ASIC Tools
- SATYA'S VLSI LINKS
- Semiconductor Datasheets on the Web - Root page
- Web Resources
- WELCOME TO DEEP'S FASCINATING WORLD OF ASIC
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RF
- ABCs of Spread Spectrum - A Technology Introduction and Tutorial
- EECS 311, Spring 2003 Home Page
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RNG
- PRSB by LFSR
- Pseudo Random Number Generator.
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Scripts
- TCL for EDA
- SIGDA Home Page
- Synopsys Compiler - Magazine for Technologists Worldwide
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TestBench
- Art of Writing TestBenches
- Model Checking Publications
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Tool Tut
- CAD Tools for VLSI Design and Test
- Cadence Tutorial
- Deep-Submicron Layout Design
- MODELSIM
- The Johns Hopkins University Cadence Users Group
- The NC State University Cadence Design Kit (CDK)
- UCSD VLSI CAD Laboratory
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Utility
- EDA-Utilities
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Verification
- Welcome to NOVEL Design Verification Page!
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Verilog Development Environment
- Source Navigator for Verilog
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VI
- Learning the vi Editor
- Welcome to EDACafe
- Welcome to IEEExpl
- Welcome to Spectrum Online
- _cssi_ Center for Silicon System Implementation CMU
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Website
- EDA and Engineering Resource Page - EpicenterTech.net
- Robert's Home Page
- ASIM department of LIP6